Category:Digital electronics

C

• Digital circuits (3 C, 38 P)
• Clock signal (19 P)

E

• Electronic design automation (4 C, 89 P)

F

• Finite automata (49 P)

I

• Integrated circuits (8 C, 170 P)

L

• Logic families (22 P)
• Logic gates (1 C, 39 P)

• Engineering:Digital electronics
• Engineering:Processor (computing)

4

• Engineering:List of 4000-series integrated circuits
• Engineering:4000-series integrated circuits

7

• Engineering:List of 7400-series integrated circuits
• Engineering:7400-series integrated circuits

A

• Engineering:Antifuse
• Asynchronous serial communication

B

• Behavior tree (artificial intelligence, robotics and control)
• Engineering:Beyond CMOS
• Bit slicing
• Engineering:Bus analyzer

C

• Engineering:C-element
• Engineering:C166 family
• Central processing unit
• Engineering:Charge sharing
• Engineering:CHMOS
• Engineering:CMOS
• Computer hardware
• Computer memory
• Computron tube
• Control unit

D

• Data processing unit
• Data storage tag
• Databending
• Datapath
• Engineering:Josephson junction count
• Engineering:Degradation (telecommunications)
• Delay line memory
• Delay-line memory
• Engineering:Delay-locked loop
• Engineering:Design flow (EDA)
• Engineering:Design for additive manufacturing
• Engineering:Design for manufacturability
• Engineering:Digital clock manager
• Digital feedback reduction
• Engineering:Digital signal conditioning
• Digital transformation
• Direct-coupled transistor logic

E

• Engineering:Elastic interface bus
• Engineering:Encoder (digital)

F

• Engineering:Fault model
• Finite state machine with datapath
• Finite-state machine with datapath
• Engineering:Flip-flop (electronics)
• Engineering:Front Panel Data Port
• Fuzzy electronics

G

• Glitch
• Glitch art
• Glitch removal
• Glitching
• Graphics processing unit

H

• Engineering:Hazard (logic)
• Engineering:HCMOS
• Engineering:High-speed transceiver logic

I

• Engineering:Integrated circuit
• Engineering:Interconnect bottleneck

L

• Leading zero
• Level shifter
• Logic optimization
• Engineering:Logic probe
• Logic redundancy
• Logic synthesis

M

• Media processor
• Memory cell (computing)
• Engineering:Metastability (electronics)
• Microprocessor chronology
• Engineering:ModelSim
• Engineering:Multi-channel length

N

• Numerically controlled oscillator
• Numerically-controlled oscillator

O

• One-hot
• Engineering:One-hot
• OR gate
• Oversampled binary image sensor

P

• Physics:Parametron
• Engineering:PCMOS
• PLEDM
• Engineering:Postdigital
• Engineering:Posted write
• Engineering:Power gating
• Engineering:Power network design (IC)
• Engineering:Power optimization (EDA)
• Programmable interrupt controller
• Engineering:Propagation delay
• Engineering:Signal propagation delay

Q

• Physics:Quantum flux parametron

R

• Physics:Rapid single flux quantum
• Register file
• Reversible computing
• Engineering:RF CMOS

S

• Engineering:SCMOS
• Engineering:Semiconductor memory
• Sequential logic
• Serial FPDP
• Shift register lookup table
• Engineering:Signal edge
• Engineering:Signal integrity
• Simatic S5 PLC
• Soft error
• Engineering:Static discipline
• Engineering:STEbus
• Engineering:Stuck-at fault
• Engineering:Superconducting computing
• Switching circuit theory

T

• Three-state logic
• Engineering:Transistor fault

U

• UML state machine

V

• VISC architecture

X

• Software:Xilinx Vivado

Y

• Company:Yospace