| Display title | Ice Lake (microarchitecture) |
| Default sort key | Ice Lake (microarchitecture) |
| Page length (in bytes) | 6,399 |
| Namespace ID | 0 |
| Page ID | 314010 |
| Page content language | en - English |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
| HandWiki item ID | None |
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
| Page creator | imported>John Stpola |
| Date of page creation | 09:07, 29 October 2022 |
| Latest editor | imported>John Stpola |
| Date of latest edit | 09:07, 29 October 2022 |
| Total number of edits | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Description | Content |
Article description: (description)
This attribute controls the content of the description and og:description elements. | Ice Lake is Intel's codename for the CPU microarchitecture to be manufactured on the 10 nm node that is expected to replace the Coffee Lake, Whiskey Lake, Amber Lake and Cannon Lake microarchitectures in 2020, representing the architecture step in Intel's "process-architecture-optimization" model... |
