Display title | Engineering:UltraSPARC T2 |
Default sort key | Ultrasparc T2 |
Page length (in bytes) | 10,482 |
Namespace ID | 3034 |
Namespace | Engineering |
Page ID | 278343 |
Page content language | en - English |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 0 |
Counted as a content page | Yes |
Page image |  |
HandWiki item ID | None |
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Page creator | imported>Unex |
Date of page creation | 10:41, 16 March 2024 |
Latest editor | imported>Unex |
Date of latest edit | 10:41, 16 March 2024 |
Total number of edits | 1 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Description | Content |
Article description: (description ) This attribute controls the content of the description and og:description elements. | Sun Microsystems' UltraSPARC T2 microprocessor is a multithreading, multi-core CPU. It is a member of the SPARC family, and the successor to the UltraSPARC T1. The chip is sometimes referred to by its codename, Niagara 2. Sun started selling servers with the T2 processor in October 2007. |