| Display title | Engineering:Stealey (microprocessor) |
| Default sort key | Stealey (microprocessor) |
| Page length (in bytes) | 2,961 |
| Namespace ID | 3034 |
| Namespace | Engineering |
| Page ID | 638724 |
| Page content language | en - English |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
| HandWiki item ID | None |
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
| Page creator | imported>NBrushPhys |
| Date of page creation | 12:16, 9 July 2022 |
| Latest editor | imported>NBrushPhys |
| Date of latest edit | 12:16, 9 July 2022 |
| Total number of edits | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Description | Content |
Article description: (description)
This attribute controls the content of the description and og:description elements. | Stealey is the codename for a low-power x86 architecture microprocessor based on a Dothan core derived from the Intel Pentium M, built on a 90 nm process with 512 KB L2 cache and 400 MT/s front side bus (FSB). It was branded as Intel A100 and Intel A110 and appeared as part of the McCaslin platform. |
