| Display title | Engineering:PowerPC e300 |
| Default sort key | PowerPC e300 |
| Page length (in bytes) | 1,507 |
| Namespace ID | 3034 |
| Namespace | Engineering |
| Page ID | 279259 |
| Page content language | en - English |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
| Page image |  |
| HandWiki item ID | None |
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
| Page creator | imported>PolicyEnforcerIA |
| Date of page creation | 08:07, 6 August 2021 |
| Latest editor | imported>PolicyEnforcerIA |
| Date of latest edit | 08:07, 6 August 2021 |
| Total number of edits | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Description | Content |
Article description: (description)
This attribute controls the content of the description and og:description elements. | The PowerPC e300 is a family of 32-bit PowerPC microprocessor cores developed by Freescale for primary use in system-on-a-chip (SoC) designs with speed ranging up to 800 MHz, thus making them ideal for embedded applications.
The e300 is a superscalar RISC core with 16/16 or 32/32 kB L1 data/instruction... |
