| Display title | Engineering:NAND gate |
| Default sort key | NAND gate |
| Page length (in bytes) | 5,233 |
| Namespace ID | 3034 |
| Namespace | Engineering |
| Page ID | 21557 |
| Page content language | en - English |
| Page content model | wikitext |
| Indexing by robots | Allowed |
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| Counted as a content page | Yes |
| HandWiki item ID | None |
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
| Page creator | imported>S.Timg |
| Date of page creation | 21:08, 4 February 2024 |
| Latest editor | imported>S.Timg |
| Date of latest edit | 21:08, 4 February 2024 |
| Total number of edits | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Description | Content |
Article description: (description)
This attribute controls the content of the description and og:description elements. | In digital electronics, a NAND gate (NOT-AND) is a logic gate which produces an output which is false only if all its inputs are true; thus its output is complement to that of an AND gate. A LOW (0) output results only if all the inputs to the gate are HIGH (1); if any input is LOW (0), a HIGH (1) output... |
