| Display title | Engineering:DEC J-11 |
| Default sort key | DEC J-11 |
| Page length (in bytes) | 2,842 |
| Namespace ID | 3034 |
| Namespace | Engineering |
| Page ID | 176140 |
| Page content language | en - English |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
| Page image |  |
| HandWiki item ID | None |
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
| Page creator | imported>OrgMain |
| Date of page creation | 22:38, 25 November 2022 |
| Latest editor | imported>OrgMain |
| Date of latest edit | 22:38, 25 November 2022 |
| Total number of edits | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Description | Content |
Article description: (description)
This attribute controls the content of the description and og:description elements. | The J-11 is a microprocessor chip set that implements the PDP-11 instruction set architecture (ISA) jointly developed by Digital Equipment Corporation and Intersil. It was a high-end chip set designed to integrate the performance and features of the PDP-11/70 onto a handful of chips. It was used in the... |
