Display title | Engineering:Coherent Accelerator Processor Interface |
Default sort key | Coherent Accelerator Processor Interface |
Page length (in bytes) | 13,006 |
Namespace ID | 3034 |
Namespace | Engineering |
Page ID | 340759 |
Page content language | en - English |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 0 |
Counted as a content page | Yes |
HandWiki item ID | None |
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Page creator | imported>S.Timg |
Date of page creation | 20:10, 4 February 2024 |
Latest editor | imported>S.Timg |
Date of latest edit | 20:10, 4 February 2024 |
Total number of edits | 1 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Description | Content |
Article description: (description ) This attribute controls the content of the description and og:description elements. | Coherent Accelerator Processor Interface (CAPI), is a high-speed processor expansion bus standard for use in large data center computers, initially designed to be layered on top of PCI Express, for directly connecting central processing units (CPUs) to external accelerators like graphics processing units... |