| Display title | Engineering:Back-side bus |
| Default sort key | Back-side bus |
| Page length (in bytes) | 4,377 |
| Namespace ID | 3034 |
| Namespace | Engineering |
| Page ID | 369259 |
| Page content language | en - English |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Counted as a content page | Yes |
| Page image |  |
| HandWiki item ID | None |
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
| Page creator | imported>WikiEditor |
| Date of page creation | 14:00, 4 February 2024 |
| Latest editor | imported>WikiEditor |
| Date of latest edit | 14:00, 4 February 2024 |
| Total number of edits | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Description | Content |
Article description: (description)
This attribute controls the content of the description and og:description elements. | In personal computer microprocessor architecture, a back-side bus (BSB), or backside bus, was a computer bus used on early Intel platforms to connect the CPU to CPU cache memory, usually off-die L2. If a design utilizes a back-side bus along with a front-side bus (FSB), the design is said to use a dual... |
