View source for Ferroelectric RAM

{{short description|Novel type of computer memory}}
{{Memory types}}
[[File:Medical Econet PalmCare - CPU module - Ramtron FM18L08-70-SG-5631.jpg|thumb|FeRAM by Ramtron]]
[[File:Fram-ferroe-electric-capacitor.png|thumb|FRAM ferroeelectric capacitor]]
'''Ferroelectric RAM''' ('''FeRAM''', '''F-RAM''' or '''FRAM''') is a [[Random-access memory|random-access memory]] similar in construction to [[Dynamic random-access memory|DRAM]] but using a [[Physics:Ferroelectric|ferroelectric]] layer instead of a [[Physics:Dielectric|dielectric]] layer to achieve non-volatility. FeRAM is one of a growing number of alternative [[Non-volatile random-access memory|non-volatile random-access memory]] technologies that offer the same functionality as [[Flash memory|flash memory]]. An FeRAM chip contains a thin  film of ferroelectric material, often [[Chemistry:Lead zirconate titanate|lead zirconate titanate]], commonly referred to as PZT. The atoms in the PZT layer change polarity in an electric field, thereby producing a power-efficient binary switch. However, the most important aspect of the PZT is that it is not affected by power disruption or magnetic interference, making FeRAM a reliable nonvolatile memory.<ref>{{cite web |url=https://www.cypress.com/products/f-ram-nonvolatile-ferroelectric-ram |title=FRAM technology |publisher=Cypress semiconductos}}</ref>

FeRAM's advantages over Flash include: lower power usage, faster write speeds<ref>{{cite web |url=http://www.inovacaotecnologica.com.br/noticias/noticia.php?artigo=fetram-memoria-nao-volatil&id=010110110929 |title=FeTRAM: memória não-volátil consome 99% menos energia| date=29 September 2011 }}</ref> and a much greater maximum read/write endurance (about 10<sup>10</sup> to 10<sup>15</sup> cycles).<ref>https://www.fujitsu.com/us/Images/MB85R4001A-DS501-00005-3v0-E.pdf {{Bare URL PDF|date=March 2022}}</ref><ref name="CY15" /> FeRAMs have data retention times of more than 10 years at +85&nbsp;°C (up to many decades at lower temperatures).
Marked disadvantages of FeRAM are much lower storage densities than flash devices, storage capacity limitations and higher cost. Like DRAM, FeRAM's read process is destructive, necessitating a [[Hazard (computer architecture)#Write after read (WAR)|write-after-read]] architecture.

==History==
Ferroelectric RAM was proposed by MIT graduate student Dudley Allen Buck in his master's thesis, ''Ferroelectrics for Digital Information Storage and Switching,'' published in 1952.<ref>Dudley A. Buck, "[http://hdl.handle.net/1721.3/40244 Ferroelectrics for Digital Information Storage and Switching]." Report R-212, MIT, June 1952.</ref>

In 1955, Bell Telephone Laboratories was experimenting with ferroelectric-crystal memories.<ref>{{cite journal |title=Computer Memories |author-first=Louis N. |author-last=Ridenour |date=June 1955 |journal=Scientific American |page=92 |url=http://blog.modernmechanix.com/2006/04/20/computer-memories/ |access-date=2016-08-22 |url-status=live |archive-url=https://web.archive.org/web/20160822160120/http://blog.modernmechanix.com/computer-memories/ |archive-date=2016-08-22}}</ref> Following the introduction of metal–oxide–semiconductor (MOS) dynamic [[Random-access memory|random-access memory]] (DRAM) chips in the early 1970s,<ref name="computerhistory1970">{{cite web |title=1970: Semiconductors compete with magnetic cores |url=https://www.computerhistory.org/storageengine/semiconductors-compete-with-magnetic-cores/ |website=Computer History Museum |access-date=19 June 2019}}</ref> development of FeRAM began in the late 1980s. Work was done in 1991 at [[Organization:NASA|NASA]]'s [[Organization:Jet Propulsion Laboratory|Jet Propulsion Laboratory]] (JPL) on improving methods of read out, including a novel method of non-destructive readout using pulses of UV radiation.<ref>[http://trs-new.jpl.nasa.gov/dspace/bitstream/2014/33777/1/94-0506.pdf Optically Addressed Ferroelectric Memory with Non-Destructive Read-Out] {{webarchive|url=https://web.archive.org/web/20090414013337/http://trs-new.jpl.nasa.gov/dspace/bitstream/2014/33777/1/94-0506.pdf |date=2009-04-14 }}</ref>

FeRAM was commercialized in the mid-1990s. In 1994, video game company [[Company:Sega|Sega]] used FeRAM chips to store saved games in ''[[Software:Sonic the Hedgehog 3|Sonic the Hedgehog 3]]'', which shipped several million game cartridges that year.<ref>{{Cite magazine|url=https://books.google.com/books?id=VjFJAQAAIAAJ|title=EDN, Volume 39, Issues 5-8|magazine=EDN|date=1994 |volume=39|issue=5–8|page=14|quote=In the highest-volume usage yet for nonvolatile ferroelectric RAMs (FRAMs), video-game maker Sega has shipped several million copies of its new game, "Sonic the Hedgehog III," which incorporates FRAMS from Ramtron International Corp to save a game between sessions.}}</ref> In 1996, [[Company:Samsung Electronics|Samsung Electronics]] introduced a 4{{nbsp}}[[Mebibit|Mb]] FeRAM chip [[Engineering:Semiconductor device fabrication|fabricated]] using [[NMOS logic]].<ref name="Scott">{{cite book |last1=Scott |first1=J.F. |chapter=Nano-Ferroelectrics |editor1-last=Tsakalakos |editor1-first=Thomas |editor2-last=Ovid'ko |editor2-first=Ilya A. |editor3-last=Vasudevan |editor3-first=Asuri K. |title=Nanostructures: Synthesis, Functional Properties and Application |date=2003 |publisher=Springer Science & Business Media |isbn=9789400710191 |pages=583-600 (584-5, 597) |chapter-url=https://books.google.com/books?id=z2ryCAAAQBAJ&pg=PA584}}</ref> In 1998, Hyundai Electronics (now [[Company:SK Hynix|SK Hynix]]) also commercialized FeRAM technology.<ref name="hynix90s">{{cite web |title=History: 1990s |url=https://www.skhynix.com/eng/about/history1990.jsp |website=[[Company:SK Hynix|SK Hynix]] |access-date=6 July 2019 |archive-date=5 February 2021 |archive-url=https://web.archive.org/web/20210205032928/https://www.skhynix.com/eng/about/history1990.jsp |url-status=dead }}</ref> The earliest known commercial product to use FeRAM is [[Company:Sony|Sony]]'s [[Engineering:PlayStation 2|PlayStation 2]] [[Engineering:PlayStation 2 accessories#Memory Card|Memory Card (8{{nbsp}}MB)]], released in 2000.{{Citation needed|date=August 2022}} The Memory Card's [[Engineering:Microcontroller|microcontroller]] (MCU) manufactured by [[Company:Toshiba|Toshiba]] contained 32{{nbsp}}[[Kibibit|kb]] (4 [[Kibibyte|kB]]) embedded FeRAM fabricated using a 500&nbsp;nm complementary MOS (CMOS) process.<ref name="Scott"/>

A major modern FeRAM manufacturer is Ramtron, a fabless semiconductor company. One major licensee is [[Company:Fujitsu|Fujitsu]], who operates one of the largest semiconductor [[Engineering:Semiconductor fabrication plant|foundry]] production lines with FeRAM capability. Since 1999 they have been using this line to produce standalone FeRAMs, as well as specialized chips (e.g. chips for smart cards) with embedded FeRAMs. Fujitsu produced devices for Ramtron until 2010.  Since 2010 Ramtron's fabricators have been TI (Texas Instruments) and IBM. Since at least 2001 [[Company:Texas Instruments|Texas Instruments]] has collaborated with Ramtron to develop FeRAM test chips in a modified 130&nbsp;nm process. In the fall of 2005, Ramtron reported that they were evaluating prototype samples of an 8-megabit FeRAM manufactured using Texas Instruments' FeRAM process. Fujitsu and Seiko-Epson were in 2005 collaborating in the development of a 180&nbsp;nm FeRAM process. In 2012 Ramtron was acquired by [[Company:Cypress Semiconductor|Cypress Semiconductor]].<ref>{{cite web| url = http://www.bizjournals.com/denver/news/2012/11/21/cypress-semiconductor-completes.html| url-status = dead| archive-url = https://web.archive.org/web/20121130201323/http://www.bizjournals.com/denver/news/2012/11/21/cypress-semiconductor-completes.html| archive-date = 2012-11-30| title = Cypress Semiconductor completes Ramtron acquisition – Denver Business Journal}}</ref>
FeRAM research projects have also been reported at [[Company:Samsung|Samsung]], Matsushita, [[Company:Oki Electric Industry|Oki]], [[Company:Toshiba|Toshiba]], Infineon, Hynix, Symetrix, [[Organization:University of Cambridge|Cambridge University]], [[Organization:University of Toronto|University of Toronto]], and the Interuniversity Microelectronics Centre (IMEC, Belgium).

==Description==
[[Image:FeRAM cell configuration 1.svg|thumb|300px|right|Structure of a FeRAM cell]]

Conventional DRAM consists of a grid of small [[Engineering:Capacitor|capacitor]]s and their associated wiring and signaling [[Engineering:Transistor|transistor]]s. Each storage element, a ''cell'', consists of one capacitor and one transistor, a so-called "1T-1C" device.

The 1T-1C storage cell design in a FeRAM is similar in construction to the storage cell in DRAM, in that both cell types include one capacitor and one access transistor. In a DRAM cell capacitor, a linear dielectric is used, whereas in a FeRAM cell capacitor the dielectric structure includes ferroelectric material, typically [[Chemistry:Lead zirconate titanate|lead zirconate titanate]] (PZT).

A ferroelectric material has a nonlinear relationship between the applied electric field and the apparently stored charge. Specifically, the ferroelectric characteristic has the form of a [[Hysteresis|hysteresis]] loop, which is very similar in shape to the hysteresis loop of [[Physics:Ferromagnetic|ferromagnetic]] materials. The dielectric constant of a ferroelectric is typically much higher than that of a linear dielectric because of the effects of semi-permanent [[Physics:Dipole|electric dipoles]] formed in the [[Chemistry:Crystal structure|crystal structure]] of the ferroelectric material. When an external electric field is applied across a dielectric, the dipoles tend to align themselves with the field direction, produced by small shifts in the positions of atoms and shifts in the distributions of electronic charge in the crystal structure. After the charge is removed, the dipoles retain their polarization state. Binary "0"s and "1"s are stored as one of two possible electric polarizations in each data storage cell. For example, in the figure a "1" is encoded using the negative remnant polarization "-Pr", and a "0" is encoded using the positive remnant polarization "+Pr".

In terms of operation, FeRAM is similar to DRAM. Writing is accomplished by applying a field across the ferroelectric layer by charging the plates on either side of it, forcing the atoms inside into the "up" or "down" orientation (depending on the polarity of the charge), thereby storing a "1" or "0". Reading, however, is somewhat different than in DRAM. The transistor forces the cell into a particular state, say "0". If the cell already held a "0", nothing will happen in the output lines. If the cell held a "1", the re-orientation of the atoms in the film will cause a brief pulse of current in the output as they push [[Physics:Electron|electron]]s out of the metal on the "down" side. The presence of this pulse means the cell held a "1". Since this process overwrites the cell, reading FeRAM is a destructive process, and requires the cell to be re-written.

In general, the operation of FeRAM is similar to ferrite core memory, one of the primary forms of computer memory in the 1960s. However, compared to core memory, FeRAM requires far less power to flip the state of the polarity and does so much faster.

==Comparison with other memory types==

===Density===
The main determinant of a memory system's cost is the density of the components used to make it up. Smaller components, and fewer of them, means that more cells can be packed onto a single chip, which in turn means more can be produced at once from a single silicon wafer. This improves yield, which is directly related to cost.

The lower limit to this scaling process is an important point of comparison.  In general, the technology that scales to the smallest cell size will end up being the least expensive per bit. In terms of construction, FeRAM and DRAM are similar, and can in general be built on similar lines at similar sizes. In both cases, the lower limit seems to be defined by the amount of charge needed to trigger the sense amplifiers. For DRAM, this appears to be a problem at around 55&nbsp;nm, at which point the charge stored in the capacitor is too small to be detected. It is not clear whether FeRAM can scale to the same size, as the charge density of the PZT layer may not be the same as the metal plates in a normal capacitor.

An additional limitation on size is that materials tend to stop being ferroelectric when they are too small.<ref name=Spanier>[http://www.materials.drexel.edu/mml/pubs/Spanier_Kolpak_etal_NL06.pdf Ferroelectric Phase Transition in Individual Single-Crystalline BaTiO3 Nanowires] {{webarchive|url=https://web.archive.org/web/20100615155151/http://www.materials.drexel.edu/mml/pubs/Spanier_Kolpak_etal_NL06.pdf |date=2010-06-15 }}. See also the associated [http://www.physorg.com/news66555256.html press release].</ref><ref>Junquera and Ghosez, ''Nature'', 2003, [https://dx.doi.org/10.1038/nature01501 DOI 10.1038/nature01501]</ref> (This effect is related to the ferroelectric's "depolarization field".) There is ongoing research on addressing the problem of stabilizing ferroelectric materials; one approach, for example, uses molecular adsorbates.<ref name=Spanier/>

To date, the commercial FeRAM devices have been produced at 350&nbsp;nm and 130&nbsp;nm. Early models required two FeRAM cells per bit, leading to very low densities, but this limitation has since been removed.

===Power consumption===
The key advantage to FeRAM over DRAM is what happens ''between'' the read and write cycles. In DRAM, the charge deposited on the metal plates leaks across the insulating layer and the control transistor, and disappears. In order for a DRAM to store data for anything other than a very short time, every cell must be periodically read and then re-written, a process known as ''refresh''. Each cell must be refreshed many times every second (typically {{#expr:1000/64 round 0}} times per second<ref>{{Cite web|url=https://www.micron.com/-/media/client/global/documents/products/technical-note/dram/tn4716.pdf|archive-url=https://web.archive.org/web/20060920032305/http://download.micron.com/pdf/technotes/ddr2/TN4716.pdf|url-status=dead|title=TN-47-16: Designing for High-Density DDR2 Memory|archive-date=September 20, 2006}}</ref>) and this requires a continuous supply of power.

In contrast, FeRAM only requires power when actually reading or writing a cell. The vast majority of power used in DRAM is used for refresh, so it seems reasonable to suggest that the benchmark quoted by STT-MRAM researchers is useful here too, indicating power usage about 99% lower than DRAM. The destructive read aspect of FeRAM may put it at a disadvantage compared to [[Physics:Magnetoresistive random-access memory|MRAM]], however.

Another non-volatile memory type is [[Flash memory|flash]], and like FeRAM it does not require a refresh process. Flash works by pushing electrons across a high-quality insulating barrier where they get "stuck" on one terminal of a [[Engineering:Transistor|transistor]]. This process requires high voltages, which are built up in a [[Engineering:Charge pump|charge pump]] over time. This means that FeRAM could be expected to be lower power than flash, at least for writing, as the write power in FeRAM is only marginally higher than reading. For a "mostly-read" device the difference might be slight, but for devices with more balanced read and write the difference could be expected to be much higher.

===Reliability===
[[File:FRAM-in-magnetic-field.png|thumb|]]
Data reliability is guaranteed in F-RAM even in a high magnetic field environment compared to [[Magnetoresistive RAM|MRAM]]. Cypress Semiconductor's<ref>{{Cite web|title=FRAM - Magnetic field Immunity|url=https://www.cypress.com/file/46731/download|publisher=Cypress Semiconductors}}</ref> F-RAM devices are immune to the strong magnetic fields and do not show any failures under the maximum available magnetic field strengths (3,700 Gauss for horizontal insertion and 2,000 Gauss for vertical insertion). In addition, the F-RAM devices allow rewriting with a different data pattern after exposure to the magnetic fields.

===Speed===
DRAM speed is limited by the rate at which the charge stored in the cells can be drained (for reading) or stored (for writing). In general, this ends up being defined by the capability of the control transistors, the capacitance of the lines carrying power to the cells, and the heat that power generates.

FeRAM is based on the physical movement of atoms in response to an external field, which is extremely fast, averaging about 1&nbsp;ns. In theory, this means that FeRAM could be much faster than DRAM. However, since power has to flow into the cell for reading and writing, the electrical and switching delays would likely be similar to DRAM overall. It does seem reasonable to suggest that FeRAM would require less charge than DRAM, because DRAMs need to ''hold'' the charge, whereas FeRAM would have been written to before the charge would have drained. However, there is a delay in writing because the charge has to flow through the control transistor, which limits current somewhat.

In comparison to flash, the advantages are much more obvious. Whereas the read operation is likely to be similar in speed, the charge pump used for writing requires a considerable time to "build up" current, a process that FeRAM does not need. Flash memories commonly need a millisecond or more to complete a write, whereas current FeRAMs may complete a write in less than 150 ns.

On the other hand, FeRAM has its own reliability issues, including imprint and fatigue. Imprint is the preferential polarization state from previous writes to that state, and fatigue is the increase of minimum writing voltage due to loss of polarization after extensive cycling.

The theoretical speed of FeRAM is not entirely clear. Existing 350&nbsp;nm devices have read times on the order of 50–60&nbsp;ns. Although slow compared to modern DRAMs, which can be found with times on the order of 2&nbsp;ns, common 350&nbsp;nm DRAMs operated with a read time of about 35&nbsp;ns,<ref>{{cite book|chapter=A 35 ns 64 Mb DRAM using on-chip boosted power supply|first1=Dong-Jae|title=1992 Symposium on VLSI Circuits Digest of Technical Papers|last1=Lee|first2=Yong-Sik|last2=Seok|first3=Do-Chan|last3=Choi|first4=Jae-Hyeong|last4=Lee|first5=Young-Rae|last5=Kim|first6=Hyeun-Su|last6=Kim|first7=Dong-Soo|last7=Jun|first8=Oh-Hyun|last8=Kwon|date=1 June 1992|pages=64–65|via=IEEE Xplore|doi=10.1109/VLSIC.1992.229238|isbn=978-0-7803-0701-8|s2cid=62372447}}</ref> so FeRAM speed appears to be comparable given the same fabrication technology.

===Additional Metrics===
{| class="wikitable"
|-
!
! Ferroelectric RAM
! [[Physics:Magnetoresistive random-access memory|Magnetoresistive random-access memory]]
! nvSRAM
! BBSRAM<!-- Removed link because it is redirected to here; i.e. infinite loop -->

|-
! Technique
| The basic storage element is a ferroelectric capacitor. The capacitor can be polarized up or down by applying an electric field<ref>{{Cite web |title=FRAM technology brief |url=https://www.cypress.com/file/46186/download |publisher=Cypress Semiconductors}}</ref>
| Similar to ferroelectric RAM, but the atoms align themselves in the direction of an external [[Physics:Magnetic field|magnetic force]].  This effect is used to store data
| Has [[Non-volatile memory|non-volatile]] elements along with high speed [[Static random-access memory|SRAM]]
| Has a lithium energy source for power when external power is off

|-
! Data retention<ref>https://site.ieee.org/pikespeak/files/2020/06/Non-Volatile-RAM-Review-ECEN-5823.pdf {{Bare URL PDF|date=March 2022}}</ref>
| 10-160 yrs<ref>{{Cite web |title=FRAM Data sheets |url=https://www.cypress.com/products/excelon-fram-memory#tabs-0-bottom_side-3 |publisher=Cypress Semiconductors}}</ref><ref name="CY15">{{Cite web |title=CY15B116QI Data Sheet |url=https://www.cypress.com/file/520996/download |publisher=Cypress Semiconductors |page=19}}</ref> || 20 yrs || 20 [[Year|yrs]] || 7 yrs, dependent on battery and [[Physics:Ambient temperature|ambient temperature]]
|-
! Endurance

|10<sup>10</sup> to 10<sup>15</sup><ref name="CY15" /><ref>{{Cite web |title=FRAM |url=http://www.cypress.com/file/136476/download |publisher=Cypress Semiconductors}}</ref>|| 10<sup>8</sup> <ref>{{cite web | url=http://www.electronicdesign.com/industrial-automation/unleashing-mram-persistent-memory | title=StackPath }}</ref> || Unlimited || Limited
|-
! Speed (best)
| 55 ns
| 35 ns
| 15–45 ns
| 70–100 ns

|-
|}

==Applications==
*Datalogger in Portable/Implantable medical devices, as FRAM consumes less energy<ref>{{Cite web
|title=Energy comparison between FRAM and EEPROM
|url=https://www.cypress.com/file/46746/download
|publisher=Cypress Semiconductors
}}</ref> compared to other non-volatile memories such as EEPROM
*Event-data-recorder in automotive systems to capture the critical system data even in case of Crash or failure
*FRAM is used Smart meters for its fast write and High endurance
*In Industrial PLC's FRAM is an ideal replacement for battery-backed SRAM (BBSRAM) and EEPROM to log machine data such as CNC tool machine position etc.

==Market==
FeRAM remains a relatively small part of the overall semiconductor market. In 2005, worldwide semiconductor sales were US$235 billion (according to the Gartner Group), with the flash memory market accounting for US$18.6 billion (according to IC Insights).{{Citation needed|date=March 2007}} The 2005 annual sales of Ramtron, perhaps the largest FeRAM vendor, were reported to be US$32.7 million.  The much larger sales of flash memory compared to the alternative NVRAMs support a much larger research and development effort. Flash memory is produced using semiconductor linewidths of 30&nbsp;nm at Samsung (2007) while FeRAMs are produced in linewidths of 350&nbsp;nm at Fujitsu and 130&nbsp;nm at Texas Instruments (2007). Flash memory cells can store multiple bits per cell (currently 4 in the highest density NAND flash devices), and the number of bits per flash cell is projected to increase to 8 as a result of innovations in flash cell design. As a consequence, the areal bit densities of flash memory are much higher than those of FeRAM, and thus the cost per bit of flash memory is orders of magnitude lower than that of FeRAM.

The density of FeRAM arrays might be increased by improvements in FeRAM foundry process technology and cell structures, such as the development of vertical capacitor structures (in the same way as DRAM) to reduce the area of the cell footprint. However, reducing the cell size may cause the data signal to become too weak to be detectable. In 2005, Ramtron reported significant sales of its FeRAM products in a variety of sectors including (but not limited to) [[Physics:Electricity meter|electricity meter]]s,<ref>{{Cite web
  |title=User Manual: Single phase, single rate, Credit Meter
  |url=http://universalmeterservices.co.uk/store/images/5193.doc
  |publisher=Ampy Automation Ltd
  |quote=The FRAM is guaranteed for a minimum of 10,000,000,000 write cycles.
}}</ref> automotive (e.g. [[Engineering:Event data recorder|black boxes]], smart [[Engineering:Airbag|air bags]]), business machines (e.g. printers, RAID disk controllers), instrumentation, medical equipment, industrial microcontrollers, and radio frequency identification tags. The other emerging NVRAMs, such as MRAM, may seek to enter similar niche markets in competition with FeRAM.

[[Company:Texas Instruments|Texas Instruments]] proved it to be possible to embed FeRAM cells using two additional masking steps{{Citation needed|date=July 2011}} during conventional CMOS semiconductor manufacture. Flash typically requires nine masks. This makes possible for example, the integration of FeRAM onto microcontrollers, where a simplified process would reduce costs. However, the materials used to make FeRAMs are not commonly used in CMOS integrated circuit manufacturing. Both the PZT ferroelectric layer and the noble metals used for electrodes raise CMOS process compatibility and contamination issues. [[Company:Texas Instruments|Texas Instruments]] has incorporated an amount of FRAM memory into its MSP430 microcontrollers in its new FRAM series.<ref>{{Cite web
|title=FRAM – Ultra-Low-Power Embedded Memory
|url=http://www.ti.com/FRAM
|publisher=Texas Instruments
}}</ref>

=== Capacity timeline ===
As of 2021 different vendors were selling chips with no more than 16Mb of memory in storage size (density).<ref>{{Cite web|last=AG|first=Infineon Technologies|title=F-RAM (Ferroelectric RAM) - Infineon Technologies|url=https://www.infineon.com/cms/en/product/memories/f-ram-ferroelectric-ram/|access-date=2021-12-18|website=www.infineon.com}}</ref>

==See also==
*[[Magnetic-core memory]]
*[[Magnetoresistive RAM|MRAM]]
*[[NvSRAM|nvSRAM]]
*[[Phase-change memory]]
*[[Programmable metallization cell]]
*[[Engineering:Memristor|Memristor]]
*[[Racetrack memory]]
*[[Bubble memory]]

==References==
{{Reflist|2}}

==External links==
*[https://www.cypress.com/products/f-ram-nonvolatile-ferroelectric-ram FRAM(FeRAM) [Cypress]
*[https://web.archive.org/web/20090228193906/http://www.ramtron-online.cn/ FRAM(FeRAM) Application Community Sponsored by Ramtron[Language: Chinese&#93;]
*[http://www.fujitsu.com/global/services/microelectronics/technical/fram/ FRAM overview by Fujitsu]
*[http://www.eecg.toronto.edu/~ali/ferro/tutorial.html FeRAM Tutorial by the Department of Electrical and Computer Engineering at the University of Toronto]
* [http://www.radio-electronics.com/info/data/semicond/memory/fram-ferroelectric-random-access-memory-basics-tutorial.php FRAM operation and technology tutorial]
;IC Chips
* [http://www.ti.com/ww/en/mcu/fram_ultra_low_power_embedded_memory/index.htm?DCMP=FRAM&HQS=Other+PR+fr57xx-pr-lp Texas Instruments Microcontroller with internal FRAM]

{{emerging technologies|topics=yes|infocom=yes}}


{{DEFAULTSORT:Ferroelectric Ram}}
[[Category:Types of RAM]]
[[Category:Non-volatile memory]]
[[Category:Ferroelectric materials]]

{{Sourceattribution|Ferroelectric RAM}}